TS-NVRAM2 Manual
The TS-NVRAM2 is a PC/104 expansion card that adds up to 2 MB of nonvolatile high-speed battery-backed RAM. It can be arranged as 8 bit or 16 bit wide memory and can be configured as paged memory or linear memory. The TS-NVRAM2 eliminates any wear-out failure and write cycle latency inherent in all Flash devices This product uses a multi-layer PCB with power and ground planes to minimize noise and EMI issues. The TS-NVRAM2 only requires a single 5V power supply.
Getting Started X86 Architecture
Install only jumpers 3 and 4 on the TS-NVRAM2, this will put the board in 8-bit mode and set the base address for all registers in the I/O space at 0×140. After a system reset, only the eight I/O registers will appear on the PC/104 bus (no memory range will be decoded) — this will avoid any conflicts with any other devices. Next write out 0×46 to I/O location 0×145 (Mode Register). This will configure the TS-NVRAM2 to use paged memory and will make it appear in memory space at 0xD0000 to 0xD7FFF (a 32 KB window). This memory range is suggested, since this range is typically free in most x86 platforms, but any 32KB range from 0xA0000 thru 0xDFFFF can be selected (see Mode register details). Now the NVRAM memory can be accessed at the memory addresses 0xD0000 to 0xD7FFF. Any one of the 64 pages can be selected by writing to the page register at I/O location 0×144. Since each page is 32 KB and there are 64 pages this allows access to all 2MB of NVRAM. Up to four TS-NVRAM boards can be installed to get up to 8MB of non-volatile memory.
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